ECE 18-447: Introduction to Computer Architecture

Computer architecture is the science and art of selecting and interconnecting hardware components and designing the hardware/software interface to create a computer that meets functional, performance, energy consumption, cost, and other specific goals. This course introduces the basic hardware structure of a modern programmable computer, including the basic laws underlying performance evaluation. We will learn, for example, how to design the control and data path hardware for a ARM-like processor, how to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems. The principles presented in the lecture are reinforced in the laboratory through the design and simulation of a register transfer level (RTL) implementation of a MIPS-like pipelined processor in Verilog. In addition, we will develop a cycle-accurate simulator of this processor in C, and we will use this simulator to explore processor design options. (from

Lecture 27 - Multiprocessors

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Lecture 01 - Introduction and Basics
Lecture 02 - Fundamental Concepts and ISA
Lecture 03 - ISA Tradeoffs
Lecture 04 - ISA Tradeoffs and MIPS ISA
Lecture 05 - Intro to Microarchitecture
Lecture 06 - Microarchitecture II
Lecture 07 - Pipelining
Lecture 08 - Pipelining II: Data and Control Dependence Handling
Lecture 09 - Branch Prediction I
Lecture 10 - Branch Prediction II
Lecture 11 - Precise Exceptions, State Maintenance and Recovery
Lecture 12 - Out of Order Exception
Lecture 13 - Out of Order Exception II and Data Flow
Lecture 14 - SIMD (Vector Processors)
Lecture 15 - GPUs, VLIW, Exception Models
Lecture 16 - Static Instruction Scheduling
Lecture 17 - Memory Hierarchy and Caches
Lecture 18 - Caches
Lecture 19 - High Performance Caches
Lecture 20 - Virtual Memory
Lecture 21 - Main Memory and the DRAM System
Lecture 22 - Memory Controllers
Lecture 23 - Memory Management
Lecture 24 - Simulation and Memory Latency Tolerance
Lecture 25 - Prefetching
Lecture 26 - More Prefetching and Emerging Memory Technologies
Lecture 27 - Multiprocessors
Lecture 28 - Memory Consistency and Cache Coherence
Lecture 29 - Cache Coherence
Lecture 30 - In-memory Processing
Lecture 31 - Predictable Performance
Lecture 32 - Heterogeneous Systems
Lecture 33 - Interconnection Networks