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VLSI Data Conversion Circuits

VLSI Data Conversion Circuits. Instructor: Prof. Shanthi Pavan, Department of Electrical Engineering, IIT Madras. This course covers the analysis and design of CMOS Analog-to-Digital and Digital-to-Analog Converters, with about 7 design assignments. Topics covered in this course include basics of A/D and D/A conversion (sampling, quantization, quantization noise, aliasing and reconstruction filtering), ADC/DAC metrics (differential and integral nonlinearity, SNR, SNDR, SFDR and dynamic range), ADC architectures (flash ADCs, oversampling converters, successive approximation converters), and DAC design (current steering DACs). (from nptel.ac.in)

Lecture 08 - Gate Boosted Switches (cont.)


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Lecture 01 - Introduction to Data Conversion
Lecture 02 - Sampling
Lecture 03 - Sampling (cont.)
Lecture 04 - Non-idealities in Samples
Lecture 05 - Noise due to Sampling
Lecture 06 - Distortion in a Sampling Switch
Lecture 07 - Gate Boosted Switches
Lecture 08 - Gate Boosted Switches (cont.)
Lecture 09 - Charge Injection
Lecture 10 - Sample and Hold Characterization
Lecture 11 - Sample and Hold Characterization (cont.)
Lecture 12 - Fast Fourier Transforms (FFTs) and Leakage
Lecture 13 - Spectral Windows
Lecture 14 - Spectral Windows (cont.)
Lecture 15 - ADC/DAC Definitions
Lecture 16 - Quantization Noise
Lecture 17 - Quantization Noise (cont.)
Lecture 18 - Oversampling and Noise Shaping
Lecture 19 - Delta-Sigma Modulation
Lecture 20 - Delta-Sigma Modulation (cont.)
Lecture 21 - Linearized Analysis
Lecture 22 - Stability of Delta Sigma Modulators
Lecture 23 - High Order DSMs
Lecture 24 - Noise Transfer Function (NTF) Design and Tradeoffs
Lecture 25 - Single Bit Modulators
Lecture 26 - Loop Filter Architectures
Lecture 27 - Continuous-Time Delta Sigma Modulation
Lecture 28 - Implicit Antialiasing
Lecture 29 - Modulators with NRZ and Impulsive DACs
Lecture 30 - High Order CTDSMs
Lecture 31 - CTDSM Design
Lecture 32 - Excess Loop Delay (ELD)
Lecture 33 - ELD Compensation
Lecture 34 - Effect of Clock Jitter on CTDSMs
Lecture 35 - Effect of Clock Jitter on CTDSMs (cont.)
Lecture 36 - Dynamic Range Scaling
Lecture 37 - Simulation of CTDSMs
Lecture 38 - Integrator Design
Lecture 39 - Integrator Design (cont.)
Lecture 40 - Flash ADC Design
Lecture 41 - Latches and Metastability
Lecture 42 - Offset in a Latch
Lecture 43 - Offset in a Latch (cont.), Auto Zeroing
Lecture 44 - Auto Zeroing (cont.)
Lecture 45 - Auto Zeroing (cont.)
Lecture 46 - Auto Zeroing in Flash ADCs
Lecture 47 - Flash ADC Case Study
Lecture 48 - Flash ADC Case Study (cont.)
Lecture 49 - Flash ADC in a Delta Sigma Loop
Lecture 50 - DAC Basics
Lecture 51 - Binary and Thermometer DACs
Lecture 52 - Segmented DACs
Lecture 53 - Optimal DAC Segmentation
Lecture 54 - DAC Nonlinearities
Lecture 55 - Current Steering DACs
Lecture 56 - Current Steering DACs (cont.)
Lecture 57 - DAC Mismatches in DSMs
Lecture 58 - Calibration and Randomization
Lecture 59 - Dynamic Element Matching
Lecture 60 - Dynamic Element Matching (cont.)