EE 140: Analog Integrated Circuits
Electrical Engineering 140: Analog Integrated Circuits (Spring 2012, UC Berkeley). Instructor: Professor Clark Tu-Cuong Nguyen. Linear Integrated Circuits - Single and multiple stage transistor amplifiers.
Operational amplifiers. Feedback amplifiers, 2-port formulation, source, load, and feedback network loading. Frequency response of cascaded amplifiers, gain-bandwidth exchange, compensation, dominant pole techniques,
root locus. Supply and temperature independent biasing and references.
| Lecture 07 - Frequency Response Inspection Analysis, Short Circuit Time Constant |
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Go to the Course Home or watch other lectures:
| Lecture 01 - Admin & Overview, Op Amps |
| Lecture 02 - Device Models I: Bipolar Junction Transistor Modeling |
| Lecture 03 - Device Models II: BJT Modeling, MOS Transistors |
| Lecture 04 - Inspection Analysis |
| Lecture 06 - Amplifier Bode Plot, Frequency Response Inspection Analysis |
| Lecture 07 - Frequency Response Inspection Analysis, Short Circuit Time Constant |
| Lecture 10 - High Swing Current Sources II |
| Lecture 11 - Current Source Matching |
| Lecture 12 - Op Amps & Emitter Coupled Pair |
| Lecture 13 - Source Coupled Pair and Current Mirror Loads (No video for first 35 mins) |
| Lecture 14 - SCP and Current Mirror Loads, Input Offset Voltage |
| Lecture 16 - High Gain Op Amps |
| Lecture 18 - Output Stages, Stability |
| Lecture 21 - Compensation: Narrowbanding & Pole-Splitting, Choosing Cc |
| Lecture 22 - Choosing Cc, CMOS Op Amp Compensation |
| Lecture 23 - Practical Compensation: RHP Zero, Nulling the RHP Zero |
| Lecture 24 - Slew Rate, Settling Time, Power Supply Rejection Ratio (PSRR) |
| Lecture 25 - Power Supply Rejection Ratio (PSRR), Feedback Configurations |
| Lecture 26 - Feedback Z (Impedance) |
| Lecture 27 - Feedback by Inspection |